#include <errno.h>
#include <time.h>
+#include <glib.h>
+#include <pbd/gstdio_compat.h>
+
#ifdef PLATFORM_WINDOWS
#include <windows.h> // for LARGE_INTEGER
#endif
apply_gain_to_buffer_t ARDOUR::apply_gain_to_buffer = 0;
mix_buffers_with_gain_t ARDOUR::mix_buffers_with_gain = 0;
mix_buffers_no_gain_t ARDOUR::mix_buffers_no_gain = 0;
+copy_vector_t ARDOUR::copy_vector = 0;
PBD::Signal1<void,std::string> ARDOUR::BootMessage;
PBD::Signal3<void,std::string,std::string,bool> ARDOUR::PluginScanMessage;
if (try_optimization) {
- FPU fpu;
+ FPU* fpu = FPU::instance();
#if defined (ARCH_X86) && defined (BUILD_SSE_OPTIMIZATIONS)
- if (fpu.has_sse()) {
+#ifdef PLATFORM_WINDOWS
+ /* We have AVX-optimized code for Windows */
+
+ if (fpu->has_avx()) {
+#else
+ /* AVX code doesn't compile on Linux yet */
+
+ if (false) {
+#endif
+ info << "Using AVX optimized routines" << endmsg;
+
+ // AVX SET
+ compute_peak = x86_sse_avx_compute_peak;
+ find_peaks = x86_sse_avx_find_peaks;
+ apply_gain_to_buffer = x86_sse_avx_apply_gain_to_buffer;
+ mix_buffers_with_gain = x86_sse_avx_mix_buffers_with_gain;
+ mix_buffers_no_gain = x86_sse_avx_mix_buffers_no_gain;
+ copy_vector = x86_sse_avx_copy_vector;
+
+ generic_mix_functions = false;
+
+ } else if (fpu->has_sse()) {
info << "Using SSE optimized routines" << endmsg;
apply_gain_to_buffer = x86_sse_apply_gain_to_buffer;
mix_buffers_with_gain = x86_sse_mix_buffers_with_gain;
mix_buffers_no_gain = x86_sse_mix_buffers_no_gain;
+ copy_vector = default_copy_vector;
generic_mix_functions = false;
apply_gain_to_buffer = veclib_apply_gain_to_buffer;
mix_buffers_with_gain = veclib_mix_buffers_with_gain;
mix_buffers_no_gain = veclib_mix_buffers_no_gain;
+ copy_vector = default_copy_vector;
generic_mix_functions = false;
apply_gain_to_buffer = default_apply_gain_to_buffer;
mix_buffers_with_gain = default_mix_buffers_with_gain;
mix_buffers_no_gain = default_mix_buffers_no_gain;
+ copy_vector = default_copy_vector;
info << "No H/W specific optimizations in use" << endmsg;
}
void
ARDOUR::setup_fpu ()
{
-
+ FPU* fpu = FPU::instance ();
+
if (getenv ("ARDOUR_RUNNING_UNDER_VALGRIND")) {
// valgrind doesn't understand this assembler stuff
// September 10th, 2007
#if defined(ARCH_X86) && defined(USE_XMMINTRIN)
int MXCSR;
- FPU fpu;
-
- /* XXX use real code to determine if the processor supports
- DenormalsAreZero and FlushToZero
- */
- if (!fpu.has_flush_to_zero() && !fpu.has_denormals_are_zero()) {
+ if (!fpu->has_flush_to_zero() && !fpu->has_denormals_are_zero()) {
return;
}
break;
case DenormalFTZ:
- if (fpu.has_flush_to_zero()) {
+ if (fpu->has_flush_to_zero()) {
MXCSR |= _MM_FLUSH_ZERO_ON;
}
break;
case DenormalDAZ:
MXCSR &= ~_MM_FLUSH_ZERO_ON;
- if (fpu.has_denormals_are_zero()) {
+ if (fpu->has_denormals_are_zero()) {
MXCSR |= 0x40;
}
break;
case DenormalFTZDAZ:
- if (fpu.has_flush_to_zero()) {
- if (fpu.has_denormals_are_zero()) {
+ if (fpu->has_flush_to_zero()) {
+ if (fpu->has_denormals_are_zero()) {
MXCSR |= _MM_FLUSH_ZERO_ON | 0x40;
} else {
MXCSR |= _MM_FLUSH_ZERO_ON;
bool
ARDOUR::translations_are_enabled ()
{
- int fd = ::open (ARDOUR::translation_enable_path().c_str(), O_RDONLY);
+ int fd = g_open (ARDOUR::translation_enable_path().c_str(), O_RDONLY, 0444);
if (fd < 0) {
return translate_by_default;
ARDOUR::set_translations_enabled (bool yn)
{
string i18n_enabler = ARDOUR::translation_enable_path();
- int fd = ::open (i18n_enabler.c_str(), O_WRONLY|O_CREAT|O_TRUNC, 0644);
+ int fd = g_open (i18n_enabler.c_str(), O_WRONLY|O_CREAT|O_TRUNC, 0644);
if (fd < 0) {
return false;